1. Field of the Invention
The present invention relates to a non-volatile memory device and a method of fabricating the same, and more particularly, to a non-volatile memory device having an asymmetric channel structure and a method of fabricating the same.
2. Description of the Related Art
Semiconductor memory devices that are used for storing data are generally categorized as volatile memory devices and non-volatile memory devices.
Volatile memory devices lose their stored data when supplied power is interrupted, while non-volatile memory devices retain their stored data even when the power supply is interrupted.
Thus, non-volatile memory devices are widely used in situations where power is not always available or frequently interrupted, and when low power usage is required, such as in mobile telecommunication systems, memory cards for storing music and/or image data, and in other applications.
Conventionally, floating gate type non-volatile memory devices have been typically used. However, recently, non-volatile memory devices having an Oxide-Nitride-Oxide (ONO) structure have been gaining importance. Such devices can reduce the vertical thicknesses of the non-volatile memory devices and improve the integration density because they have a driving method similar to the floating gate type non-volatile memory devices and charge carriers are stored using a nitride layer as a charge storing layer instead of a floating gate formed of a polysilicon film. Among the different types of ONO non-volatile memory devices, local ONO non-volatile memory devices having a form in which a nitride layer functioning as a charge trapping layer is distributed in only a partial region have been extensively studied.
FIG. 1 is a cross-sectional view illustrating programming and erasing operations of a conventional local ONO non-volatile memory device.
Referring to FIG. 1, a conventional local ONO non-volatile memory device 10 includes a semiconductor substrate 100, a source region 110, a drain region 120, a tunneling layer 130, a charge trapping layer 140, a gate insulating layer 150 and a gate electrode 160 which are formed on the semiconductor substrate 100.
The local ONO non-volatile memory device 10 has a structure which can be programmed by hot electron injection.
If a positive voltage is applied to the gate electrode 160 and an appropriate voltage is applied to the source region 110 and the drain region 120, hot electrons from the semiconductor substrate 100 pass through the tunneling layer 130 and are then trapped by the charge trapping layer 140 (a region where the hot electrons are trapped is indicated as a region A of FIG. 1). This is referred to as a programming operation of the charge trapping layer 140.
If a negative voltage is applied to the gate electrode 160 and an appropriate voltage is applied to the source region 110 and the drain region 120, hot holes from the semiconductor substrate 100 are trapped by the charge trapping layer 140. The hot holes combine with the hot electrons which are previously trapped by the charge trapping layer 140, thereby electrically neutralizing the charge trapping layer 140. This is referred to as an erasing operation of the programmed charge trapping layer 140.
However, when performing the erasing operation, the hot holes are actually distributed in only a region B shown in FIG. 1 by an electromagnetic effect. Accordingly, the erasing operation is not completely performed in a region C of an electron trapping region (referred to as the region A).
As a result, as the number of times the programming and erasing operations are performed increases, the range of the region C where the erasing operation is not performed is increased and the range of the region B where the erasing operation is performed is decreased.
Generally, if the hot electrons are trapped by the charge trapping layer 140, the threshold voltage (Vth) is increased by a shielding effect. However, if the range of a region (the region C) where the hot electrons are not erased is increased as the number of times the programming and erasing operations are performed increases, the characteristics of the programming and erasing operations of the local ONO non-volatile memory device are degraded.